EC39004: Vlsi Laboratory

EC39004
Course name	VLSI LABORATORY
Offered by	Electronics & Electrical Communication Engineering
Credits	2
L-T-P	0-0-3
Previous Year Grade Distribution
34 39 30 6 6 2 EX A B C D P F
Semester	{{{semester}}}

Syllabus

Syllabus mentioned in ERP

Transistor-level Circuit Design using Cadence Design Flow1. Circuit design (paper-pencil design w/o cadence)2. Schematic capture and simulation3. Circuit layout and layout vs. schematic check4. Parameter extraction from layout and post-layout simulationô Design experiments:o Familiarization with Cadence schematic-to-layout flow using inverter designo A cascode amplifier designo A differential amplifier designo A current source designo An operational transconductance amplifier design⢠Logic-level Circuit Design using Xilinx FPGA Design Flow1. Architectural level design (paper-pencil design w/o Xilinx)2. HDL coding of the design and logic simulation3. Synthesis and postsynthesis logic simulation4. Implementation (placement and routing)5. Downloading to FPGA and verification of designô Design experiments:o Familiarization with Xilinx HDL-to-implementation flow using ripple-carry adder designo Carry Look Ahead addero Arithmetic Multipliero Carry Bypass addero Barrel shiftero Logarithmic shiftero Sequence detectoro Left/right shiftero Synchronous up/down countero Linear feedback shift register