CS40016: Electronic Design Automation

CS40016
Course name	Electronic Design Automation
Offered by	Computer Science & Engineering
Credits	3
L-T-P	3-0-0
Previous Year Grade Distribution
{{{grades}}}
Semester	Spring

Syllabus

Syllabus mentioned in ERP

Two-level and multi-level logic optimization of combinational circuits, state assignment of finite state machines. Technology mapping for FPGAs. Techniques for partitioning, floor planning, placement and routing. Architectural models, scheduling, allocation and binding for high-level synthesis.Hardware-software codesign. Test generation, fault simulation, built-in self test, test structures. Verilog and VHDL.References1.R. H. Katz, Contemporary Logic Design, Addison-Wesley.2.M. J. S. Smith, Application-Specific Integrated Circuits, Addison-Wesley.3.W. Wolf, Modern VLSI Design: Systems on Silicon, Pearson Education.4.J. Bhasker, Verilog VHDL Synthesis: A Practical Primer, B S Publications.5.D. D. Gajski, N. D. Dutt, A. C. Wu and A. Y. Yin, High-level Synthesis: Introduction to Chip and System Design, Kluwer Academic Publishers.6.M. Abramovici, M. A. Breuer and A. D. Friedman, Digital Systems Testing and Testable Design, IEEE Press.7.P. Bardell, W. H. McAnney and J. Savir, Built-in Test for VLSI: Pseudo-random Techniques, John Wiley and Sons.8.M. Sarrafzadeh and C. K. Wong, An Introduction to Physical Design, McGraw Hill.9.N. A. Sherwani, Algorithms for VLSI Physical Design Automation, Kluwer Academic Publishers.10.S. M. Sait and H. Youssef, VLSI Physical Design Automation: Theory and Practice, World Scientific.